In this lecture, Professor Fernanda Kastensmidt presents an in-depth analysis of radiation effects in All-Programmable Systems-on-Chip (APSoCs), with a focus on both SRAM-based and Flash-based architectures. The presentation examines the susceptibility of modern APSoCs—such as those integrating ARM cores with programmable logic—to Single Event Upsets (SEUs) and Multiple Bit Upsets (MBUs) in various subsystems, including embedded processors, on-chip memories (SRAM, BRAM), programmable logic, and configuration memory (CRAM). These effects are characterized using a combination of fault injection campaigns and radiation experiments with proton and heavy-ion beams. The results highlight how system-level vulnerability is influenced by architectural decisions such as memory hierarchy, communication interfaces, and hardware/software partitioning. To mitigate these challenges, Professor Kastensmidt introduces a comprehensive set of fault-tolerance strategies tailored for APSoCs operating in harsh environments like space. These include Triple Modular Redundancy (TMR) in the programmable logic, Error Correction Codes (ECC) in memory structures, and configuration memory scrubbing specifically designed for SRAM-based APSoCs to counter persistent bit-flips. The talk also emphasizes hardware/software co-design techniques, such as lockstep cores, checkpoint/rollback, and dynamic cache management to reduce exposure to radiation-induced faults. Through this layered and adaptable approach, the talk demonstrates how reliability can be significantly improved without prohibitive overhead, paving the way for the dependable use of APSoCs in aerospace, automotive, and critical embedded applications.

In this lecture, Professor Fernanda Kastensmidt addresses the challenges and solutions in designing fault-tolerant AI accelerators for All Programmable SoCs (APSoCs), such as Xilinx Zynq devices. These platforms integrate general-purpose processors with reconfigurable logic, making them ideal for edge AI applications in aerospace, automotive, and radiation-prone environments. The presentation focuses on CNN inference engines including FINN, ZynqNet, and systolic arrays, which are mapped onto the programmable logic to accelerate convolutional neural networks (CNNs) under tight constraints of latency, power, and reliability. Professor Kastensmidt presents a fault-tolerant design methodology that combines Triple Modular Redundancy (TMR) at the engine level, error detection and correction (EDAC) for internal buffers and BRAMs, and configuration memory scrubbing to protect the FPGA’s CRAM. Design-level hardening techniques are applied to the datapath, control logic, and memory interfaces, while maintaining compatibility with quantization and folding strategies required for resource-constrained deployments. The talk also includes results from fault injection campaigns and radiation experiments, highlighting how upsets in CNN accelerators may corrupt activations, weights, or control states, and how selective mitigation can restore functional correctness with minimal area and performance overhead. This research bridges the gap between AI acceleration and radiation-aware design, enabling robust and efficient inference in critical systems.